DocumentCode
1963920
Title
A 25GS/s 6b TI binary search ADC with soft-decision selection in 65nm CMOS
Author
Shengchang Cai ; Tabasy, Ehsan Zhian ; Shafik, Ayman ; Kiran, Shiva ; Hoyos, Sebastian ; Palermo, Samuel
Author_Institution
Analog & Mixed-Signal Center, Texas A&M Univ., College Station, TX, USA
fYear
2015
fDate
17-19 June 2015
Abstract
A 25GS/s 8-way time-interleaved binary search ADC employs a novel soft-decision selection algorithm to improve metastability tolerance and relax T/H settling requirements. The T/H design is further relaxed with reduced loading from a new shared-input three comparator structure. Fabricated in GP 65nm CMOS, the ADC achieves 4.62-bits ENOB at Nyquist and 143 fJ/conv.-step FOM, while consuming 88mW and occupying 0.24mm2 core ADC area.
Keywords
CMOS integrated circuits; analogue-digital conversion; search problems; CMOS integrated circuit; analog-digital converter; metastability tolerance; power 88 mW; size 65 nm; soft-decision selection algorithm; time interleaved binary search ADC; CMOS integrated circuits; Calibration; Clocks; Latches; Redundancy; Timing; Very large scale integration; ADC; binary search; soft-decision selection; time interleaving;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Circuits (VLSI Circuits), 2015 Symposium on
Conference_Location
Kyoto
Print_ISBN
978-4-86348-502-0
Type
conf
DOI
10.1109/VLSIC.2015.7231248
Filename
7231248
Link To Document