• DocumentCode
    1963950
  • Title

    A memory supplier´s outlook on die products

  • Author

    Skinner, Dan

  • Author_Institution
    Micron Technol., Inc., Boise, ID, USA
  • fYear
    2003
  • fDate
    16-18 July 2003
  • Firstpage
    195
  • Lastpage
    196
  • Abstract
    Mobile PCs and servers, wireless handsets, personal appliances and other mobile applications are driving the need for high-performance, low-cost, small form factor memory solutions. For this reason, die products as well as integrated packaging technologies are increasingly more prevalent as memory solutions designed into these applications. System designs are increasingly implementing integrated packaging strategies, such as the multichip package (MCP) or stacked package and system in package (SiP) products. The growth in die product demand is reflected in semiconductor manufacturers development of new production and test processes to enable the production of die products with a higher yield. The applications integrating die products are diverse, each one with its own form factor and device characteristic requirements. The emergence of several new packaging and die product solutions offers designers options and the ability to pick the technology that best meets their design requirements. The wafer level chip scale package (WLCSP) is an example of an emerging packaging technology. WLCSP with a redistribution layer (RDL) applied provides many advantages over the standard thin small outline package (TSOP) and ball grid array (BGA) packages including electrical, thermal, and mechanical properties.
  • Keywords
    ball grid arrays; chip scale packaging; random-access storage; semiconductor technology; wafer bonding; ball grid array packages; die products; electrical properties; integrated packaging technologies; mechanical properties; memory solutions; mobile PC; mobile applications; multichip package; packaging technology; redistribution layer; semiconductor manufacturers; stacked package; test processes; thermal properties; thin small outline package; wafer level chip scale package; wireless handsets; Chip scale packaging; Home appliances; Manufacturing processes; Personal communication networks; Production; Semiconductor device manufacture; Semiconductor device packaging; Semiconductor device testing; Telephone sets; Wafer scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronics Manufacturing Technology Symposium, 2003. IEMT 2003. IEEE/CPMT/SEMI 28th International
  • ISSN
    1089-8190
  • Print_ISBN
    0-7803-7933-0
  • Type

    conf

  • DOI
    10.1109/IEMT.2003.1225898
  • Filename
    1225898