Title :
The Realization of SAR Real-Time Signal Processor by FPGA
Author :
SUN, Zhi-Jian ; LIU, Xue-Mei
Author_Institution :
Coll. of Sci., Qingdao Technol. Univ., Qingdao
Abstract :
The computation amount of SAR radar image is huge. To reach real-time speed, we need high-function device. The computation task of SAR concentrates on range and azimuth compressions. Usual measure of compression is using high speed DSP, but FPGA technique is improving so fast that it has become a better way to realize compression than DSP. DSP often needs external interface and control chips to work together while one FPGA chip accomplishes almost the whole work, the circuit will become more simple and steady. In this paper, combined our real work, introduces the design and realization of SAR real-time processing system by STRATIX ALTERA Co.
Keywords :
data compression; digital arithmetic; digital signal processing chips; fast Fourier transforms; field programmable gate arrays; radar imaging; synthetic aperture radar; FFT; FPGA chip; SAR; azimuth compression; external interface; radar image; range compression; real-time digital signal processor; Azimuth; Circuits; Digital signal processing chips; Field programmable gate arrays; Image coding; Radar imaging; Semiconductor device measurement; Signal processing; Synthetic aperture radar; Velocity measurement; Digital Signal Processing; Synthetic Aperture Radar (SAR); data compress; digital signal process in real time; the algorithmic of the Fast Fourier Transform Algorithm (FFT);
Conference_Titel :
Computer Science and Software Engineering, 2008 International Conference on
Conference_Location :
Wuhan, Hubei
Print_ISBN :
978-0-7695-3336-0
DOI :
10.1109/CSSE.2008.1438