Title :
A 2.9-dB noise figure, Q-band millimeter-wave CMOS SOI LNA
Author :
Parlak, Mehmet ; Buckwalter, James F.
Abstract :
This paper discusses a two-stage low noise amplifier (LNA) implemented in a 45nm CMOS SOI process that operates between 43 and 53 GHz. The LNA stages are based on a cascode amplifier with simultaneous noise and input power matching. The LNA exhibits a minimum noise figure (NF) of 2.9 dB at 47 GHz and measured gain of 18.5 dB at 49 GHz. The output P1dB compression power is 3 dBm and saturation output power is 7 dBm to reach a peak efficiency of 22%. The measured OIP3 is 14 dBm. The LNA occupies an area of 0.35mm2 with pads and consumes 19 mA from 1.2 V supply. The results present the lowest noise figure for a silicon-based millimeter-wave LNA.
Keywords :
CMOS analogue integrated circuits; elemental semiconductors; field effect MIMIC; low noise amplifiers; millimetre wave amplifiers; silicon; silicon-on-insulator; Q-band millimeter-wave CMOS SOI LNA process; Si; cascode amplifier; current 19 mA; efficiency 22 percent; frequency 43 GHz to 53 GHz; gain 18.5 dB; input power matching; minimum noise figure; noise figure 2.9 dB; silicon-based millimeter-wave LNA; simultaneous noise; size 45 nm; two-stage low noise amplifier; voltage 1.2 V; CMOS integrated circuits; CMOS technology; Gain; Inductors; Millimeter wave technology; Noise; Noise measurement; Low noise amplifier (LNA); Q-Band; noise figure (NF); silicon on insulator (SOI);
Conference_Titel :
Custom Integrated Circuits Conference (CICC), 2011 IEEE
Conference_Location :
San Jose, CA
Print_ISBN :
978-1-4577-0222-8
DOI :
10.1109/CICC.2011.6055321
