A 0.7 V 256 μW ΔΣ modulator with passive RC integrators achieving 76 dB DR in 2 MHz BW

Author

de Melo, Joao L. A. ; Goes, Joao ; Paulino, Nuno

Author_Institution

Fac. de Cienc. e Tecnol., Univ. Nova de Lisboa, Caparica, Portugal

fYear

2015

fDate

17-19 June 2015

Abstract

A continuous-time (CT) delta-sigma modulator (ΔΣM), with 27.5 fJ/conv.-step energy efficiency, employing passive RC integrators is proposed. A simple differential pair is incorporated in the loop-filter between each passive RC integrator and, the extra required gain in the loop is obtained in the comparator. Due to the many design issues, such as the trade-off between RC variations and loop stability, the modulator is optimized using genetic algorithms (GAs). The 65 nm CMOS ΔΣM, occupying only 0.013 mm², dissipates 256 μW from a 0.7 V supply and achieves a peak SNDR of 69.1 dB with 2 MHz bandwidth (BW). The dynamic range (DR) reaches 76.2 dB, which corresponds to a FoM_Schreier of 175.1 dB.

Keywords

CMOS integrated circuits; RC circuits; continuous time systems; delta-sigma modulation; filters; genetic algorithms; integrating circuits; passive networks; CMOS ΔΣ; CT ΔΣM; FoMSchreier; bandwidth 2 MHz; continuous-time delta-sigma modulator; dynamic range; genetic algorithms; loop stability; loop-filter; passive RC integrators; power 256 muW; size 0.013 mm; size 65 nm; voltage 0.7 V; Bandwidth; CMOS integrated circuits; Design methodology; Gain; Modulation; Resistors; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Circuits (VLSI Circuits), 2015 Symposium on

Conference_Location

Kyoto

Print_ISBN

978-4-86348-502-0

Type

conf

DOI

10.1109/VLSIC.2015.7231294

Filename

7231294