DocumentCode :
1964945
Title :
A 90nm data flow processor demonstrating fine grained DVS for energy efficient operation from 0.25V to 1.2V
Author :
Shakhsheer, Y. ; Khanna, S. ; Craig, K. ; Arrabi, S. ; Lach, J. ; Calhoun, B.H.
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Virginia, Charlottesville, VA, USA
fYear :
2011
fDate :
19-21 Sept. 2011
Firstpage :
1
Lastpage :
4
Abstract :
We present a 90nm data flow processor that executes DSP algorithms using fine grained DVS at the component level with rapid VDD switching and VDD dithering for near-ideal quadratic dynamic energy scaling from 0.25V-1.2V. Measurements show energy savings up to 50% and 46% compared to single-VDD and multi-VDD alternatives.
Keywords :
microprocessor chips; power aware computing; signal processing; DSP algorithms; data flow processor; dynamic voltage scaling; energy efficient operation; energy savings; fine grained DVS; near-ideal quadratic dynamic energy scaling; size 90 nm; voltage 0.25 V to 1.2 V; Adders; Clocks; Delay; Energy measurement; Switches; Voltage control;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Custom Integrated Circuits Conference (CICC), 2011 IEEE
Conference_Location :
San Jose, CA
ISSN :
0886-5930
Print_ISBN :
978-1-4577-0222-8
Type :
conf
DOI :
10.1109/CICC.2011.6055335
Filename :
6055335
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=1964945
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