Title :
Towards the Monolithic Integration of III-V Compound Semiconductors on Si: Selective Area Growth in High Aspect Ratio Structures vs. Strain Relaxed Buffer-Mediated Epitaxy
Author :
Cantoro, M. ; Merckling, C. ; Jiang, S. ; Guo, W. ; Waldron, N. ; Bender, H. ; Moussa, A. ; Douhard, B. ; Vandervorst, W. ; Heyns, M.M. ; Dekoster, J. ; Loo, R. ; Caymax, M.
Author_Institution :
IMEC, Leuven, Belgium
Abstract :
We report two approaches to integrate high quality III-V templates by epitaxial growth with low defectivity on Si wafers. The first approach is based on blanket, InGaAs-based Strain Relaxed Buffers grown by MOVPE on 200mm Si, and the second on the selective area MOVPE of InP in Shallow Trench Isolation structures patterned on 300mm Si. Both structures are characterized structurally and show the efficient trapping and annihilation of defects propagation from the Si/III-V interface. We believe these two approaches represent viable alternatives towards the realization of CMOS-compatible III-V templates and stacks for high-performance devices monolithically integrated on Si.
Keywords :
III-V semiconductors; MOCVD; buffer circuits; elemental semiconductors; gallium arsenide; indium compounds; isolation technology; monolithic integrated circuits; silicon; vapour phase epitaxial growth; CMOS-compatible III-V template; III-V compound semiconductor; III-V template; InGaAs-Si; defect propagation; defectivity; efficient trapping; epitaxial growth; monolithic integration; selective area MOVPE; selective area growth; shallow trench isolation structure; size 200 mm; size 300 mm; strain relaxed buffer-mediated epitaxy; Epitaxial layers; Indium phosphide; Molecular beam epitaxial growth; Silicon; Substrates;
Conference_Titel :
Compound Semiconductor Integrated Circuit Symposium (CSICS), 2012 IEEE
Conference_Location :
La Jolla, CA
Print_ISBN :
978-1-4673-0928-8
DOI :
10.1109/CSICS.2012.6340064
