Read-out Circuit Analysis for High-speed Low-noise VCO Based APS CMOS Image Sensor

A detailed read-out circuit analysis of the VCO based APS CMOS image sensor is presented in this paper. According to the mathematic analysis and simulation results, the read-out speed should be decreased when reducing the bias current. Moreover, the feature of the device gain factor and the source follower´s threshold voltage are vestigated, showing important effects with respect to not only the read-out time but also the energy consumption. The proposed VCO based read-out circuit and frequency counter consist an equivalent bandpass filter. According to the transfer function analysis of this equivalent filter, the noise cancellation efficiency is jointly determined by the bias current, device gain factor and source follower´s threshold voltage, which constitute the basic principles for high-speed low-noise CMOS APS image sensor design.