Developing System-on-Chips with Moore, Amdahl, Pareto, and Ohm

Author

Jensen, David W.

Author_Institution

Adv. Technol. Center, Rockwell Collins, Inc., Cedar Rapids, IA

fYear

2008

fDate

18-20 May 2008

Firstpage

13

Lastpage

18

Abstract

Understanding the rules for a development effort is essential for success. In this paper, we provide an overview of four important rules for a system-on-chip (SoC) development. We portray these rules as members of our development team: Moore, Amdahl, Pareto, and Ohm. Their guidance provides a foundation for our system and architecture optimization. We review a methodology to migrate large software systems to billion transistors SoCpsilas. We offer a background on the rules, detail the design methodology, and explore the derived benefits.

Keywords

logic design; system-on-chip; Amdahl law; Moores law; Ohm law; Pareto principle; architecture optimization; software system; system-on-chip development; Computer architecture; Costs; Design methodology; Moore´s Law; Power engineering and energy; Software systems; System-on-a-chip; Technology forecasting; Transistors; Voltage; Amdahl; Billion Transistor Architecture; Moore; Ohm; Pareto; Performance; Power; System on Chips;

fLanguage

English

Publisher

ieee

Conference_Titel

Electro/Information Technology, 2008. EIT 2008. IEEE International Conference on

Conference_Location

Ames, IA

Print_ISBN

978-1-4244-2029-2

Electronic_ISBN

978-1-4244-2030-8

Type

conf

DOI

10.1109/EIT.2008.4554260

Filename

4554260