A novel audio playback chip using digitally driven speaker architecture with 80%@-10dBFS power efficiency, 5.5W@3.3V supply and 100dB SNR

Author

Yoshino, Michitaka ; Iwaide, Mitsuhiro ; Kuniyoshi, Daigo ; Ohtani, Hajime ; Yasuda, Akira ; Okamura, Jun-ichi

Author_Institution

Hosei Univ., Tokyo, Japan

fYear

2011

fDate

19-21 Sept. 2011

Firstpage

1

Lastpage

4

Abstract

A novel audio playback chip using digitally driven speaker architecture based on a delta-sigma modulator and newly proposed high-order mismatch shaper with novel dither circuit is presented. It can realize 5.5W output power into 4Ω speakers with only 3.3V power supply. The power efficiency from -10dBFS to 0dBFS is higher than 80%. The efficiency at low power output can realize long battery life. This chip can realize battery powered high-fidelity and high-power audio system.

Keywords

audio systems; delta-sigma modulation; SNR; audio playback chip; battery powered high-fidelity; battery powered high-fidelity high-power audio system; delta-sigma modulator; digitally driven speaker architecture; dither circuit; efficiency 80 percent; high-order mismatch shaper; noise figure 100 dB; power 5.5 W; power efficiency; resistance 4 ohm; voltage 3.3 V; CMOS integrated circuits; Coils; Loudspeakers; Matched filters; Noise; Power amplifiers; Power generation;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference (CICC), 2011 IEEE

Conference_Location

San Jose, CA

ISSN

0886-5930

Print_ISBN

978-1-4577-0222-8

Type

conf

DOI

10.1109/CICC.2011.6055385

Filename

6055385