A simple 4 quadrant NMOS analog multiplier with input range equal to ±VDD and very low THD

A simple 4 quadrant analog multiplier using bulk NMOS transistors is presented in the paper. All the NMOS transistors in the circuit operate in saturation region. The complete circuit contains only 4 NMOS transistors as active devices. The proposed circuit has very good linearity, low THD, large input range and bandwidth. The input dynamic range of the circuit is plusmnVDD. The THD in the output waveform is smaller than 0.3% when the inputs are sine waves of peak-to-peak voltage 2.VDD. When input sine waves are of peak-to-peak voltage VDD, the THD is less than 0.14%. The 3dB bandwidth of the circuit is over 600 MHz. The circuit also has good noise performance compared to other similar works, due to less number of devices used. Quiescent power consumption of the overall circuit is only 214 muWatts.