DocumentCode :
1966843
Title :
CMOS circuit technology for sub-ambient temperature operation
Author :
Aller, I. ; Bernstein, K. ; Ghoshal, U. ; Schettler, H. ; Schuster, S. ; Taur, Y. ; Torreiter, O.
Author_Institution :
IBM Entwicklung GmbH, Boebingen, Germany
fYear :
2000
fDate :
9-9 Feb. 2000
Firstpage :
214
Lastpage :
215
Abstract :
Sub-ambient-temperature operation can remove important device scaling and circuit performance bottlenecks in sub-100 nm CMOS technologies. It permits scaling of supply voltages of high-speed circuits to sub-1 V by reducing the subthreshold currents and increasing the carrier mobility in the channels, lowers interconnection resistances significantly, and eliminates electromigration-related failure mechanisms. This paper analyzes the advantages of reduced temperature operation at the circuit level for server applications, while the accompanying paper describes refrigeration techniques for sub-ambient temperature operation.
Keywords :
CMOS integrated circuits; cryogenic electronics; integrated circuit technology; 1 V; 100 nm; CMOS circuit technology; carrier mobility; electromigration failure; interconnection resistance; low-voltage high-speed circuit; server; sub-ambient temperature operation; subthreshold current; CMOS technology; Delay; Hardware; Immune system; Integrated circuit interconnections; Inverters; Leakage current; Silicon on insulator technology; Temperature; Threshold voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 2000. Digest of Technical Papers. ISSCC. 2000 IEEE International
Conference_Location :
San Francisco, CA, USA
ISSN :
0193-6530
Print_ISBN :
0-7803-5853-8
Type :
conf
DOI :
10.1109/ISSCC.2000.839754
Filename :
839754
Link To Document :
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