DocumentCode :
1967006
Title :
A parallel vector quantization processor eliminating redundant calculations for real-time motion picture compression
Author :
Nozawa, T. ; Konda, M. ; Fujibayashi, M. ; Imai, M. ; Ohmi, T.
Author_Institution :
Dept. of Electr. Eng., Tohoku Univ., Sendai, Japan
fYear :
2000
fDate :
9-9 Feb. 2000
Firstpage :
234
Lastpage :
235
Abstract :
A technique to eliminate redundant distance calculations is used in a vector quantization (VQ) processor which handles 2048 template vectors with a single chip. A real-time motion picture compression system employing this chip can transmit five QVGA (320/spl times/240 pixels) images per second at <64 kb/s.
Keywords :
data compression; digital signal processing chips; image coding; image motion analysis; parallel processing; real-time systems; vector quantisation; 64 kbit/s; parallel processor; real-time motion picture compression; single chip; vector quantization; Bandwidth; Circuits; Hardware; Image coding; Image quality; Image reconstruction; Microprocessors; Motion pictures; Pixel; Vector quantization;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Circuits Conference, 2000. Digest of Technical Papers. ISSCC. 2000 IEEE International
Conference_Location :
San Francisco, CA, USA
ISSN :
0193-6530
Print_ISBN :
0-7803-5853-8
Type :
conf
DOI :
10.1109/ISSCC.2000.839764
Filename :
839764
Link To Document :
بازگشت