Title :
A 4-way VLIW embedded multimedia processor
Author :
Suga, A. ; Sukemura, T. ; Takahashi, H. ; Wada, K. ; Miyake, H. ; Nakamura, Y. ; Takebe, Y. ; Azegami, I. ; Hirose, Y. ; Kimura, M. ; Okano, T. ; Shiota, T. ; Saito, M. ; Wakayama, S. ; Ozawa, T. ; Satoh, T. ; Sakurai, A. ; Katayama, T. ; Abe, K. ; Kuwano
Author_Institution :
Fujitsu Labs. Ltd., Kawasaki, Japan
Abstract :
Performance requirements are soaring for embedded processors, whose demand in multimedia processing is rising now more than ever. Some DSP and media processors satisfy this by means of VLIW architecture. However, for embedded processors, less code, low power and small die are compulsory. These requirements make 4-way super-scalar embedded processor impractical. This embedded processor utilizes 4-way VLIW architecture characterized by: (1) parallel execution by VLIW. (2) generic CPU function in combination with media processing function for enhancing multimedia processing ability. (3) NOP instruction suppressing by packing flags for compatibility among different parallel levels. (4) two parallel execution mechanisms, ILP and SIMD.
Keywords :
embedded systems; low-power electronics; microprocessor chips; multimedia computing; parallel architectures; VLIW architecture; four-way VLIW embedded multimedia processor; generic CPU function; low power electronics; parallel execution mechanisms; parallel levels; Digital signal processing; Floating-point arithmetic; Graphics; Image processing; Large scale integration; Pipelines; Registers; Speech recognition; Streaming media; VLIW;
Conference_Titel :
Solid-State Circuits Conference, 2000. Digest of Technical Papers. ISSCC. 2000 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-5853-8
DOI :
10.1109/ISSCC.2000.839767
