DocumentCode :
1967171
Title :
40Gbit/s interface conversion circuit for 40GbE, STM-256/OC-768 and OTU3 serial signal transport
Author :
Aisawa, Shigeki ; Tomizawa, Masahito
Author_Institution :
NTT Network Innovation Labs., Yokosuka, Japan
fYear :
2010
fDate :
8-12 Dec. 2010
Firstpage :
393
Lastpage :
394
Abstract :
We develop 40Gbit/s interface conversion prototype circuits for 40GbE, STM-256/OC-768 and OTU3 tri-rate serial signal transport with 65nm CMOS technology. A conversion function between the SFI-5.1 and the SFI-5.2/XLAUI is demonstrated for the first time. The 16:4 MUX and 4:16 DEMUX prototype chips consume 1.6 and 1.7 W, respectively.
Keywords :
CMOS integrated circuits; peripheral interfaces; CMOS technology; DEMUX prototype chips; OTU3 serial signal transport; OTU3 trirate serial signal transport; STM-256/OC-768; conversion function; interface conversion circuit; interface conversion prototype circuits; Detectors; Generators; Jitter; Optical device fabrication; Optical interconnections; Prototypes; Semiconductor device measurement;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Communications and Photonics Conference and Exhibition (ACP), 2010 Asia
Conference_Location :
Shanghai
Print_ISBN :
978-1-4244-7111-9
Type :
conf
DOI :
10.1109/ACP.2010.5682505
Filename :
5682505
Link To Document :
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