Title :
A channel-erasing 1.8 V-only 32 Mb NOR flash EEPROM with a bit-line direct-sensing scheme
Author :
Atsumi, S. ; Umezawa, A. ; Tanzawa, T. ; Taura, T. ; Shiga, H. ; Takano, Y. ; Miyaba, T. ; Matsui, M. ; Watanabe, Hiromi ; Isobe, K. ; Kitamura, S. ; Yamada, Shigeru ; Saito, M. ; Mori, S. ; Watanabe, Toshio
Author_Institution :
ULSI Device Eng. Lab., Toshiba Corp., Yokohama, Japan
Abstract :
A 1.8 V-only 32 Mb NOR flash EEPROM uses a channel-erasing scheme for the 0.49 /spl mu/m/sup 2/ cell in 0.25 /spl mu/m CMOS technology. The block decoder circuit with an erase-reset sequence performs channel-erase. The bit line direct sense permits sub-1.8 V operation, suitable for use in handheld systems.
Keywords :
CMOS memory circuits; NOR circuits; flash memories; 0.25 micron; 1.8 V; 32 Mbit; CMOS technology; NOR flash EEPROM; bit line direct sense; block decoder circuit; channel erase; hand-held system; EPROM; Sampling methods; Solid state circuits;
Conference_Titel :
Solid-State Circuits Conference, 2000. Digest of Technical Papers. ISSCC. 2000 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-5853-8
DOI :
10.1109/ISSCC.2000.839783
