Title :
Accelerated Deterministic Multithreading for Multichannel Video Decoder
Author :
Shin, Youngsam ; Son, Minyoung ; Lee, Seungwon ; Lee, Shihwa
Author_Institution :
Samsung Adv. Inst. of Technol., Samsung Electron. Co., Ltd., Yongin, South Korea
Abstract :
One of the major challenges in developing applications for multicore systems is dealing with non-deterministic behavior. One solution to making threads deterministic is to control their relative execution order based on their progress. That is, we enforce the threads to be interleaved in an order, and the order is determined by the progress of each thread. In this paper, we introduce an efficient deterministic runtime architecture with a deterministic logical counter and an efficient interleaving technique for deterministic multithreading. As a case study, we implement 24 video decoders on a quad core system using the proposed deterministic runtime system.
Keywords :
decoding; multi-threading; video coding; accelerated deterministic multithreading; deterministic logical counter; deterministic runtime architecture system; interleaving technique; multichannel video decoder; multicore systems; nondeterministic behavior; relative execution order control; Decoding; Instruction sets; Multicore processing; Multithreading; Runtime; Deterministic Multithreading; Embedded System; Multicore; Parallel Programming;
Conference_Titel :
Computer Software and Applications Conference (COMPSAC), 2012 IEEE 36th Annual
Conference_Location :
Izmir
Print_ISBN :
978-1-4673-1990-4
Electronic_ISBN :
0730-3157
DOI :
10.1109/COMPSAC.2012.51