A variable-frequency parallel I/O interface with adaptive power supply regulation

Adaptive power supply regulation reduces power dissipation in DSP and microprocessor cores. A technique extends this concept to a high-performance parallel input/output (I/O) interface. An inverter, used as the basic delay element in the core of a dual-loop delay-locked loop (DLL), has delay controlled by the supply voltage. This control voltage is replicated by a high-efficiency switching supply to power the rest of the interface and to maximize energy-efficient operation.