Title :
A 3 V low-power 0.25 /spl mu/m CMOS 100 Mb/s receiver for Fast Ethernet
Author :
Shoaei, O. ; Shoval, A. ; Leonowich, R.
Author_Institution :
Lucent Technol., AT&T Bell Labs., Allentown, PA, USA
Abstract :
A transceiver with excellent performance was recently reported. However, a higher level of integration for multi-channel transceivers for switch application and also for battery-operated laptop markets demands a device with a much lower power consumption with no performance degradation. This AGC and equalizer architecture and circuits address this demand for a low-power transceiver.
Keywords :
CMOS integrated circuits; automatic gain control; equalisers; local area networks; low-power electronics; mixed analogue-digital integrated circuits; transceivers; 0.25 micron; 100 Mbit/s; 3 V; AGC; CMOS; Fast Ethernet; battery-operated laptop markets; equalizer architecture; low-power transceiver; multi-channel transceivers; performance degradation; power consumption; Capacitors; Circuit optimization; Ethernet networks; Feedback circuits; Feedback loop; Frequency; MOSFETs; Parasitic capacitance; Resistors; Transceivers;
Conference_Titel :
Solid-State Circuits Conference, 2000. Digest of Technical Papers. ISSCC. 2000 IEEE International
Conference_Location :
San Francisco, CA, USA
Print_ISBN :
0-7803-5853-8
DOI :
10.1109/ISSCC.2000.839793
