Title :
An Adiabatic Register File Based on Improved CAL Circuits Using Single-Phase Power Clock
Author :
Hu, Jianping ; Zhu, Jiaguo ; Li, Hong
Author_Institution :
Fac. of Inf. Sci. & Technol., Ningbo Univ., Ningbo, China
Abstract :
This paper presents an adiabatic register file based on improved CAL (Clocked Adiabatic Logic) circuits, which can operate in a single-phase power clock. All the circuits except for the storage cells use improved CAL circuits. The storage cell is based on the conventional memory one. For a comparison, a conventional register file is also realized. Full-custom layouts are drawn, which is realized using TSMC 0.18 ¿m process, and the net-lists are extracted from their layouts. The post-layout simulations have been performed. The results show that the single-phase adiabatic register file can work very well, illustrating an overall power reduction of about 63% compared with the conventional one at 100 MHz.
Keywords :
clocks; timing circuits; TSMC 0.18¿m process; adiabatic register file; clocked adiabatic logic; frequency 100 MHz; improved CAL circuits; layout design; power reduction; single phase power clock; size 0.18 micron; CMOS logic circuits; Capacitance; Circuit simulation; Clocks; Energy dissipation; Logic circuits; Logic design; MOS devices; Recycling; Registers; VLSI design; clocked adiabatic logic; layout design; low power; register file;
Conference_Titel :
Innovative Computing & Communication, 2010 Intl Conf on and Information Technology & Ocean Engineering, 2010 Asia-Pacific Conf on (CICC-ITOE)
Conference_Location :
Macao
Print_ISBN :
978-1-4244-5634-5
Electronic_ISBN :
978-1-4244-5635-2
DOI :
10.1109/CICC-ITOE.2010.79
