0.5-1 V 2 GHz RF front-end circuits in CMOS/SIMOX

Minimizing supply voltage is one of the most effective ways to attain low-power RF circuits. These 2 GHz receiver front-end blocks operate down to 0.5 V. They are a low noise amplifier (LNA), a downconversion mixer, and a voltage-controlled oscillator (VCO) fabricated by 0.2 /spl mu/m fully-depleted CMOS/SIMOX technology, which is one of the thin-film silicon-on-insulator (SOI) technologies. The 0.5 V operation results from using two circuit techniques. One is an LC-tuned folded Gilbert cell, and the other is the use of undoped MOSFETs in the VCO core and buffers for the mixer and VCO. SOI devices have excellent RF performance even at voltages below 1V because of reduced capacitance in the drain region compared to bulk-CMOS technologies. Moreover, fully-depleted CMOS/SIMOX technology allows undoped MOSFETs with no process steps added to the normal digital CMOS/SIMOX LSI fabrication. The undoped MOSFETs are normally-on transistors and can be made simply by masking in the channel-doping process. Thus, they have the same structure as normal (doped) ones except for the impurity concentration in their channel region. They do not show punch-through current even in short-channel devices. This is because the potential of their thin-film channel region is perfectly controlled by the gate. The undoped MOSFETs are effective in designing RF circuits that operate at 0.5 V.