DocumentCode
1968815
Title
A Power Bipolar Transistor Optimized for Linear Performance up to 5 GHz
Author
Wong, R.W. ; Chen, J.T.C. ; Snapp, C.P. ; Solomon, R. ; Stewart, R.R.
Author_Institution
Hewlett-Packard Company, MSD, Palo Alto, CA 94304, USA
fYear
1976
fDate
14-17 Sept. 1976
Firstpage
534
Lastpage
538
Abstract
A linear power transistor with 1.6 ¿m emitter width, 34 emitter sites, and individual emitter ballast resistors has been developed using a new transistor process which has excellent reproducibility. Such a transistor has been packaged with a single stage of input matching which transforms the input impedance to an easily usable value in the 4 GHz region. Experimental linear output power of 500 mW has been measured with a corresponding gain of 7.5 dB at the 1 dB gain compression point at 4 GHz, and with useful gain and power at 5 GHz. Data is presented on the transistor´s linear power performance, S-parameters from 2 to 5 GHz, and third-order intercept points.
Keywords
Bipolar transistors; Electronic ballasts; Gain; Impedance matching; Packaging; Power generation; Power measurement; Power transistors; Reproducibility of results; Resistors;
fLanguage
English
Publisher
ieee
Conference_Titel
Microwave Conference, 1976. 6th European
Conference_Location
Rome, Italy
Type
conf
DOI
10.1109/EUMA.1976.332332
Filename
4130998
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