Title :
Delta-I noise avoidance methodology for high performance chip designs [CMOS microprocessors]
Author :
Cases, Moises ; Singh, Bhupindra ; Smith, Howard
Author_Institution :
IBM Corp., Austin, TX, USA
Abstract :
A methodology which controls induced di/dt noise for high performance chip designs is described. Delta-I modeling and analysis for the chip, module and card is used to define a strategy and effectiveness of various decoupling schemes over a broad frequency range.
Keywords :
CMOS digital integrated circuits; integrated circuit design; integrated circuit modelling; integrated circuit noise; microprocessor chips; CMOS microprocessors; IC noise modeling; chip design; decoupling schemes; delta-I noise; induced di/dt noise; CMOS technology; Capacitors; Circuit noise; Design methodology; Frequency; Noise generators; Packaging; Power supplies; Switching circuits; Voltage;
Conference_Titel :
Electrical Performance of Electronic Packaging, 1997., IEEE 6th Topical Meeting on
Conference_Location :
Austin, TX
Print_ISBN :
0-7803-8649-3
DOI :
10.1109/EPEP.1997.634030
