DocumentCode :
1969042
Title :
Low-cost technique for reducing the simultaneous switching noise in sub-board packaging configurations
Author :
Koike, Shinji ; Kaizu, Katsumi
Author_Institution :
NTT Network Service Syst. Labs., Musashino, Japan
fYear :
1997
fDate :
27-29 Oct. 1997
Firstpage :
35
Lastpage :
38
Abstract :
A low-cost technique for reducing simultaneous switching noise in a sub-board packaging configuration has been developed. By using a thin insulator film made of conventional FR4 substrate material, the noise is reduced about 50% when 32 switching gates are simultaneously driven at 622.08 Mb/s in a sub-board with an area of 11/spl times/10 cm.
Keywords :
circuit noise; large scale integration; packaging; printed circuit design; surface mount technology; 622.08 Mbit/s; FR4 substrate material; low-cost technique; simultaneous switching noise; sub-board area; sub-board packaging configurations; switching gates; thin insulator film; Conductive films; Connectors; Frequency; Insulation; Large scale integration; Noise reduction; Packaging; Power supplies; Substrates; Telecommunication switching;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electrical Performance of Electronic Packaging, 1997., IEEE 6th Topical Meeting on
Conference_Location :
Austin, TX
Print_ISBN :
0-7803-8649-3
Type :
conf
DOI :
10.1109/EPEP.1997.634033
Filename :
634033
Link To Document :
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