Verify: key to the stable single-electron-memory operation

Author

Ishii, T. ; Yano, K. ; Sano, T. ; Mine, T. ; Murai, F. ; Seki, K.

Author_Institution

Central Res. Lab., Hitachi Ltd., Tokyo, Japan

fYear

1997

fDate

10-10 Dec. 1997

Firstpage

171

Lastpage

174

Abstract

The impact of verify, which has been used in flash memory but has not been associated with single-electron memory, is analyzed and experimentally demonstrated. Using verify overcomes many obstacles to large-scale integration, including background charge variation, the inherent stochastic behavior of single-electron dynamics, and nanoscale structure variation, especially in naturally formed nanostructures, such as nano-silicon. A write/erase endurance of 10/sup 7/ cycles was demonstrated with nano-Si memory devices.

Keywords

ULSI; circuit stability; elemental semiconductors; integrated memory circuits; nanotechnology; silicon; single electron transistors; Si; background charge variation; large-scale integration; nanoscale structure variation; naturally formed nanostructures; single-electron-memory operation; stochastic behavior; verify; write/erase endurance; Electrodes; Flash memory; Laboratories; Large scale integration; Nanoscale devices; Nanostructures; Single electron memory; Stochastic processes; Threshold voltage; Writing;

fLanguage

English

Publisher

ieee

Conference_Titel

Electron Devices Meeting, 1997. IEDM '97. Technical Digest., International

Conference_Location

Washington, DC, USA

ISSN

0163-1918

Print_ISBN

0-7803-4100-7

Type

conf

DOI

10.1109/IEDM.1997.650301

Filename

650301