An 8–18 GHz Low noise amplifier design in 0.18μm CMOS technology

A new method to achieve wideband input impedance matching and small die area for current-reused cascade low noise amplifier (LNA) is presented. The proposed circuit is designed and simulated at X/Ku-Band using the TSMC 0.18μm CMOS process. The wideband input impedance matching was achieved by taking advantage of the resistive shunt-shunt feedback and source-degeneration topology, but in the proposed circuit the resistive feedback signal is taken from different node in contrast to the traditional cascade LNA. By utilizing a center-tapped inductor (CTI) at the inter-stage network of the LNA a high gain is obtained over the entire bandwidth (BW) with small die area. Analytical expressions have been derived for the input impedance matching of the circuit. Using the proposed technique, power gain of 17±.5dB and noise figure between 2.8-4dB was achieved in a bandwidth of 8-18GHz. The input and output return losses are better than -10dB in the frequency band from 8GHz up to 18GHz.