Title :
Digital signal array processor for NSLS booster power supply upgrade
Author :
Olsen, R. ; Dabrowski, J. ; Murray, J.
Author_Institution :
Nat. Synchrotron Light Source, Brookhaven Nat. Lab., Upton, NY, USA
Abstract :
The booster at the NSLS is being upgraded from 0.75 to 2 pulses per second. To accomplish this; new power supplies for the dipole, quadrupole, and sextupole have been installed. This paper will outline the design and function of the digital signal processor used as the primary control element in the power supply control system
Keywords :
electron accelerators; parallel processing; physical instrumentation control; power supplies to apparatus; signal processing; NSLS booster; design; digital signal array processor; dipole; power supply control system; quadrupole; sextupole; Connectors; Control systems; Digital signal processing; Error correction; Logic; Phase locked loops; Power supplies; Random access memory; Signal design; Signal processing;
Conference_Titel :
Particle Accelerator Conference, 1993., Proceedings of the 1993
Conference_Location :
Washington, DC
Print_ISBN :
0-7803-1203-1
DOI :
10.1109/PAC.1993.309154
