DocumentCode :
1970186
Title :
Arsenic and Phosphorus co-Implantation for Deep Submicron CMOS Gate and Source/Drain Engineering
Author :
Augendre, E. ; De Keersgieter, A. ; Kubicek, S. ; Redolfi, A. ; Van Laer, J. ; Badenes, G.
Author_Institution :
IMEC, Leuven, Belgium
fYear :
2001
fDate :
11-13 September 2001
Firstpage :
115
Lastpage :
118
Keywords :
CMOS technology; Capacitors; Costs; Distortion measurement; Doping profiles; Parasitic capacitance; Pulp manufacturing; Quantum capacitance; Temperature measurement; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid-State Device Research Conference, 2001. Proceeding of the 31st European
Print_ISBN :
2-914601-01-8
Type :
conf
DOI :
10.1109/ESSDERC.2001.195214
Filename :
1506596
Link To Document :
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