DocumentCode :
1970261
Title :
Via-minimization expert for multilayer switchbox routing
Author :
Gu, David ; Lee, Chong H.
Author_Institution :
Dept. of Electr. & Comput. Eng., Notre Dame Univ., IN, USA
fYear :
1989
fDate :
14-16 Aug 1989
Firstpage :
543
Abstract :
An expert system which deals with the multilayer switchbox routing problem is presented. The system, based on ExperOPS5, minimizes the number of vias by graph-theoretic approach. The early results of tests show that this algorithm finds the layer assignment with a significantly smaller number of vias in the multilayer switchbox
Keywords :
VLSI; circuit layout CAD; expert systems; graph theory; integrated circuit technology; network topology; CAD; ExperOPS5; VLSI layout; computer aided design; expert system; graph-theoretic approach; layer assignment; multilayer switchbox routing; via minimisation; Circuit optimization; Costs; Expert systems; Manufacturing; Minimization; Nonhomogeneous media; Routing; Testing; Very large scale integration; Wire;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1989., Proceedings of the 32nd Midwest Symposium on
Conference_Location :
Champaign, IL
Type :
conf
DOI :
10.1109/MWSCAS.1989.101911
Filename :
101911
Link To Document :
بازگشت