Title :
A BIST scheme for on-chip ADC and DAC testing
Author :
Huang, Jiun-Lang ; Ong, Chee-Kian ; Cheng, Kwang-Ting
Author_Institution :
Dept. of Electr. & Comput. Eng., California Univ., Santa Barbara, CA, USA
Abstract :
In this paper we present a BIST scheme for testing on-chip A/D and D/A converters. We discuss on-chip generation of linear ramps as test stimuli, and propose techniques for measuring the DNL and INL of the converters. We validate the scheme with software simulation-5% LSB (least significant bit) test accuracy can be achieved in the presence of reasonable analog imperfection
Keywords :
analogue-digital conversion; built-in self test; digital-analogue conversion; integrated circuit testing; ramp generators; A/D converters; BIST scheme; D/A converters; DNL measurement; INL measurement; linear ramp test stimuli; onchip ADC testing; onchip DAC testing; onchip linear ramp generation; Built-in self-test; Circuit testing; Delta-sigma modulation; Digital signal processing; Hip; Integrated circuit testing; Logic testing; Polynomials; Signal processing algorithms; Voltage;
Conference_Titel :
Design, Automation and Test in Europe Conference and Exhibition 2000. Proceedings
Conference_Location :
Paris
Print_ISBN :
0-7695-0537-6
DOI :
10.1109/DATE.2000.840041
