Title :
Gate and Source/Drain Engineering for 50 nm P-Channel MOSFET
Author :
Guegan, G. ; Deleonibus, S. ; Bertrand, G. ; Souil, D. ; Rivallin, P. ; Tedesco, S. ; Mur, P. ; Holliger, P. ; Nier, M.E.
Author_Institution :
CEA/LETI, Grenoble, France
fDate :
11-13 September 2001
Keywords :
Boron; Cost function; Electronic mail; Ion implantation; Job shop scheduling; Lithography; MOSFET circuits; Manufacturing; Microelectronics; Production;
Conference_Titel :
Solid-State Device Research Conference, 2001. Proceeding of the 31st European
Print_ISBN :
2-914601-01-8
DOI :
10.1109/ESSDERC.2001.195228