DocumentCode
1970670
Title
A new approach for computation of timing jitter in phase locked loops
Author
Gourary, M.M. ; Rusakov, S.G. ; Ulyanov, S.L. ; Zharov, M.M. ; Gullapalli, K.K. ; Mulvaney, B.J.
Author_Institution
IPPM, Acad. of Sci., Moscow, Russia
fYear
2000
fDate
2000
Firstpage
345
Lastpage
349
Abstract
A new method for computation of timing jitter in a PLL is proposed. The computational method is based on the representation of the circuit as a linear time-varying system with modulated stationary noise models, spectral decomposition of stochastic process and decomposition of noise into orthogonal components i.e. phase and amplitude noise. The method is illustrated by examples of jitter computation in PLLs
Keywords
circuit noise; phase locked loops; phase noise; stochastic processes; time-varying networks; timing jitter; amplitude noise; computational method; jitter computation; linear time-varying system; modulated stationary noise models; orthogonal components; phase locked loops; phase noise; spectral decomposition; stochastic process; timing jitter; Analysis of variance; Chirp modulation; Circuit noise; Differential equations; Noise level; Performance analysis; Phase locked loops; Phase noise; Timing jitter; Transient analysis;
fLanguage
English
Publisher
ieee
Conference_Titel
Design, Automation and Test in Europe Conference and Exhibition 2000. Proceedings
Conference_Location
Paris
Print_ISBN
0-7695-0537-6
Type
conf
DOI
10.1109/DATE.2000.840294
Filename
840294
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