DocumentCode :
1970854
Title :
Bonding of thin films on 200 mm silicon wafers using chemical mechanical polishing
Author :
Jones, E.C. ; Tiwari, S. ; Chan, K.K. ; Solomon, P.M. ; Power, M.
Author_Institution :
IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
fYear :
1998
fDate :
5-8 Oct. 1998
Firstpage :
161
Lastpage :
162
Abstract :
New types of double-gated integrated circuit devices require the construction of a silicon layer on top of multilayer stacks of material, for example, placing thin oxide and conductor layers underneath the silicon. Bonding deposited films like low temperature oxides (LTO), TEOS and heavily doped amorphous silicon to thermal oxide on 200 mm wafers is then necessary. Although LTO and TEOS grown on silicon are very smooth, doped a-Si and films grown on n/sup +/ a-Si are quite rough. As micro-scale surface roughness has a strong effect on the success of silicon wafer bonding (Roberds and Farrens, 1996), chemical-mechanical polishing before bonding is necessary when films are deposited with high roughness or if surfaces become rough during processing (Gui et al, 1997). As the wafers are intended for integrated circuit processing, film thickness variation over the 200 mm wafer and its effect on the wafer bonding are also concerns.
Keywords :
amorphous semiconductors; chemical mechanical polishing; dielectric thin films; elemental semiconductors; integrated circuit interconnections; integrated circuit metallisation; semiconductor-insulator boundaries; silicon; surface topography; wafer bonding; 200 mm; Si; Si-SiO/sub 2/; TEOS films; bonding deposited films; chemical mechanical polishing; conductor layers; doped a-Si layers; double-gated integrated circuit devices; film thickness variation; heavily doped amorphous silicon films; integrated circuit processing; low temperature oxides; micro-scale surface roughness; multilayer stacks; silicon layer; silicon wafer bonding; silicon wafers; smooth oxide layers; surface roughness; thermal oxide; thin film bonding; thin oxide layers; wafer bonding; wafer size; Chemicals; Conducting materials; Nonhomogeneous media; Rough surfaces; Semiconductor films; Semiconductor thin films; Silicon; Surface roughness; Thin film circuits; Wafer bonding;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
SOI Conference, 1998. Proceedings., 1998 IEEE International
Conference_Location :
Stuart, FL, USA
ISSN :
1078-621X
Print_ISBN :
0-7803-4500-2
Type :
conf
DOI :
10.1109/SOI.1998.723161
Filename :
723161
Link To Document :
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