DocumentCode :
1971040
Title :
Circuit Modeling and Time Delay Analysis of Double-Walled Carbon Nanotube Interconnects
Author :
Fu, Ge ; Yin, Wen-Yan
Author_Institution :
Sch. of Electron. Inf. & Electr. Eng., Shanghai Jiao Tong Univ., Shanghai
fYear :
2007
fDate :
11-14 Dec. 2007
Firstpage :
1
Lastpage :
4
Abstract :
An equivalent distributed circuit model of a double- walled carbon nanotube (DWCNT) is proposed in this paper. The comparison in time delay is made between double- and single- walled carbon nanotube (SWCNT) interconnects at different technology levels, such as local, intermediate and global levels. It is shown that using DWCNT the reduction of time delay, as much as 15% to 25% for intermediate and global interconnects, can be expected. Such improvement could be even better as the carbon nanotube(CNT) diameters increase, which offers potential applications in future interconnects.
Keywords :
carbon nanotubes; equivalent circuits; double-walled carbon nanotube; equivalent distributed circuit model; single-walled carbon nanotube; time delay analysis; Carbon nanotubes; Contact resistance; Delay effects; Electrostatics; Information analysis; Integrated circuit interconnections; Microwave circuits; Microwave technology; Quantum capacitance; Radio frequency; Interconnect; double-walled carbon nanotube (DWCNT); single-walled carbon nanotube (SWCNT); time delay;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microwave Conference, 2007. APMC 2007. Asia-Pacific
Conference_Location :
Bangkok
Print_ISBN :
978-1-4244-0748-4
Electronic_ISBN :
978-1-4244-0749-1
Type :
conf
DOI :
10.1109/APMC.2007.4554555
Filename :
4554555
Link To Document :
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