DocumentCode
1971163
Title
N-Well Engineering to Improve Soft-Error-Rate Immunity for P-Type Substrate SRAM Technologies
Author
Puchner, H. ; Liu, Y.-C. ; Kong, W. ; Duan, F. ; Castagnetti, R.
Author_Institution
LSI Logic Corporation, Santa Clara, USA
fYear
2001
fDate
11-13 September 2001
Firstpage
295
Lastpage
298
Keywords
Alpha particles; CMOS logic circuits; CMOS technology; Doping; Implants; Large scale integration; Random access memory; Single event upset; Substrates; Voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Solid-State Device Research Conference, 2001. Proceeding of the 31st European
Print_ISBN
2-914601-01-8
Type
conf
DOI
10.1109/ESSDERC.2001.195259
Filename
1506641
Link To Document