DocumentCode :
1971669
Title :
Characterization of peripheral and core SSOs in a flip-chip package
Author :
Kollipara, Ravindranath ; Lin, Lei ; Oehrle, Gary
Author_Institution :
Methodology Dev. Group, LSI Logic Corp., Milpitas, CA, USA
fYear :
1997
fDate :
27-29 Oct. 1997
Firstpage :
121
Lastpage :
124
Abstract :
Electrical characterization of various SSO (simultaneous switching output) buffers placed on the periphery and in the core of a flip-chip is performed. The multilayer CBGA package has multiple power and ground planes and signal routing layers. Methodology guide lines are developed based on the characterization results.
Keywords :
buffer circuits; flip-chip devices; integrated circuit noise; integrated circuit packaging; network routing; SSO buffers; ceramic BGA package; electrical characterization; flip-chip package; ground planes; methodology guide lines; multilayer CBGA package; power planes; signal routing layers; simultaneous switching output noise; Clocks; Inductance; Logic; Nonhomogeneous media; Packaging; Power supplies; Ring oscillators; Routing; Signal to noise ratio; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electrical Performance of Electronic Packaging, 1997., IEEE 6th Topical Meeting on
Conference_Location :
Austin, TX
Print_ISBN :
0-7803-8649-3
Type :
conf
DOI :
10.1109/EPEP.1997.634053
Filename :
634053
Link To Document :
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