DocumentCode
1972697
Title
Using operating point-dependent degradation and gm /ID method for aging-aware design
Author
Hellwege, Nico ; Heidmann, Nils ; Peters-Drolshagen, D. ; Paul, Sudipta
Author_Institution
Inst. of Electrodynamics & Microelectron. (ITEM.me), Univ. of Bremen, Bremen, Germany
fYear
2013
fDate
13-17 Oct. 2013
Firstpage
113
Lastpage
116
Abstract
Effects like NBTI and HCI are degrading the characteristics of analog circuits. Available countermeasures to maintain system performances often include the use of optimizers or other external tools to size devices appropriately, which give no insight in relations between degradation and circuit parameters for the designer. This paper proposes an extension of the gm/ID sizing method by considering aged transistor parameters for fresh circuit design. A possible usage scenario for this investigation is given by optimizing a simple circuit towards higher reliability. The degradation in amplification of a common source amplifier is reduced by 19 % for a full time operation of 10 years.
Keywords
MOSFET; ageing; integrated circuit design; integrated circuit reliability; semiconductor device reliability; HCI; NBTI; aged transistor parameters; aging-aware design; analog circuits; circuit design; operating point-dependent degradation; reliability; Aging; Degradation; Integrated circuits; MOSFET; Reliability; Aging; Analog; EKV; HCI; NBTI; Reliability Degradation;
fLanguage
English
Publisher
ieee
Conference_Titel
Integrated Reliability Workshop Final Report (IRW), 2013 IEEE International
Conference_Location
South Lake Tahoe, CA
ISSN
1930-8841
Print_ISBN
978-1-4799-0350-4
Type
conf
DOI
10.1109/IIRW.2013.6804172
Filename
6804172
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