• DocumentCode
    1972729
  • Title

    A new method for analysis of cycling-induced degradation components in split-gate flash memory cells

  • Author

    Tkachev, Yuri ; Kotov, Alexander

  • Author_Institution
    Silicon Storage Technol., Inc., Microchip Technol., Inc., San Jose, CA, USA
  • fYear
    2013
  • fDate
    13-17 Oct. 2013
  • Firstpage
    117
  • Lastpage
    120
  • Abstract
    A new simple and fast method for separation of cycling-induced degradation components in split-gate SuperFlash® cell is proposed. The method is based on the effect of tunneling current stabilization during linearly ramped erase voltage.
  • Keywords
    flash memories; integrated circuit reliability; integrated memory circuits; tunnelling; SuperFlash cell; cycling-induced degradation components; linearly ramped erase voltage; split-gate flash memory cells; tunneling current stabilization; Charge carrier processes; Degradation; Electric potential; Logic gates; Nonvolatile memory; Programming; Tunneling; Flash memory; electron trapping; electron tunneling; floating gate; memory reliability; oxide degradation; program-erase cycling endurance;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Integrated Reliability Workshop Final Report (IRW), 2013 IEEE International
  • Conference_Location
    South Lake Tahoe, CA
  • ISSN
    1930-8841
  • Print_ISBN
    978-1-4799-0350-4
  • Type

    conf

  • DOI
    10.1109/IIRW.2013.6804173
  • Filename
    6804173
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1972729