• DocumentCode
    1973543
  • Title

    Asynchronous interaction in massively parallel computing

  • Author

    Varscavsky, V.L.

  • Author_Institution
    Aizu Univ.
  • Volume
    2
  • fYear
    1995
  • fDate
    19-21 Apr 1995
  • Firstpage
    951
  • Abstract
    From the standpoint of hardware experts, asynchronism is connected with the concept of physical time as an independent physical variable and is determined by the variations of transient process durations in hardware circuits, modules and blocks that are physical objects by their nature. Software and architecture experts treat asynchronism as a partial order on events that are logical objects, i.e. they think in terms of logical time. In these terms, asynchronism is the variation of the process step quantity without respect to the real duration of these seeps in physical time. The measuring tool for time is a clock and the precision of the clock (along with the system of signal delivery) we can attain determines the area of its application (the allowed value of physical time step). The basic idea of self-timing is detecting the moments when transient processes in physical components are over and producing the corresponding logical signals that provide the transition to logical time (delay-insensitive design) in spite of the delay variation reasons. As all the logical signals invariant to the physical time and representing the events in the system are formed, self-timed methodology has a number of efficient hardware support methods to coordinate the events of the corresponding concurrent specification
  • Keywords
    concurrency control; parallel processing; asynchronous interaction; concurrent specification; delay-insensitive design; efficient hardware support methods; logical signals; massively parallel computing; self-timed methodology; self-timing; transient processes; Area measurement; Circuits; Clocks; Computer architecture; Delay effects; Hardware; Parallel processing; Signal design; Signal processing; Time measurement;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Algorithms and Architectures for Parallel Processing, 1995. ICAPP 95. IEEE First ICA/sup 3/PP., IEEE First International Conference on
  • Conference_Location
    Brisbane, Qld.
  • Print_ISBN
    0-7803-2018-2
  • Type

    conf

  • DOI
    10.1109/ICAPP.1995.472302
  • Filename
    472302