Title :
Adaptive load sharing for network processors
Author :
Kencl, Lukas ; Le Boudec, Jean-Yves
Author_Institution :
IBM Zurich Res. Lab., Ruschlikon, Switzerland
Abstract :
A novel scheme for processing packets in a router is presented, which provides for load sharing among multiple network processors distributed within the router. It is complemented by a feedback control mechanism designed to prevent processor overload. Incoming traffic is scheduled to multiple processors based on a deterministic mapping. The mapping formula is derived from the robust hash routing (also known as the highest random weight - HRW) scheme, introduced in K.W. Ross, IEEE Network, vol. 11, no. 6 (1997), and D.G. Thaler et al, IEEE Trans. Networking, vol. 6, no. 1 (1998). No state information on individual flow mapping needs to be stored, but for each packet, a mapping function is computed over an identifier vector, a predefined set of fields in the packet. An adaptive extension to the HRW scheme is provided in order to cope with biased traffic patterns. We prove that our adaptation possesses the minimal disruption property with respect to the mapping and exploit that property in order to minimize the probability of flow reordering. Simulation results indicate that the scheme achieves significant improvements in processor utilization. A higher number of router interfaces can thus be supported with the same amount of processing power.
Keywords :
adaptive control; feedback; probability; processor scheduling; telecommunication congestion control; telecommunication network routing; telecommunication traffic; HRW scheme; adaptive load sharing; biased traffic patterns; deterministic mapping; feedback control mechanism; flow reordering probability; identifier vector; incoming traffic scheduling; mapping function; minimal disruption property; multiple processors; network processors; packet processing; processor overload; processor utilization; robust hash routing; router; Communication system traffic control; Energy consumption; Engines; Feedback control; Load management; Process design; Processor scheduling; Robustness; Switches; Telecommunication traffic;
Conference_Titel :
INFOCOM 2002. Twenty-First Annual Joint Conference of the IEEE Computer and Communications Societies. Proceedings. IEEE
Print_ISBN :
0-7803-7476-2
DOI :
10.1109/INFCOM.2002.1019299