DocumentCode
1974025
Title
MPW implementation of integer-pixel motion estimation circuit for 1080HD video encoder
Author
Park, Gyun ; Cho, Kyeongsoon
Author_Institution
Dept. of Electron. Eng., Hankuk Univ. of Foreign Studies, Yongin, South Korea
fYear
2010
fDate
22-23 Nov. 2010
Firstpage
436
Lastpage
439
Abstract
We propose a new H.264 integer-pixel motion estimation algorithm and circuit architecture to improve the processing speed. The proposed circuit supports 7 kinds of variable block sizes and generates 41 motion vectors. Our circuit based on the proposed algorithm and architecture processes 60 image frames per second for 1080HD video at the operating frequency of 45.5MHz. We implemented an MPW chip using 180 nm standard cell library for silicon verification.
Keywords
encoding; motion estimation; vectors; video coding; H.264 integer-pixel motion estimation algorithm; cell library; circuit architecture; frequency 45.5 MHz; high-definition video encoder; integer-pixel motion estimation circuit; motion vector; multiproject wafer chip; silicon verification; Automatic voltage control; Calculators; Computer architecture; Motion estimation; PSNR; Pixel; Registers; 1080HD; H.264; MPW; Motion Estimation;
fLanguage
English
Publisher
ieee
Conference_Titel
SoC Design Conference (ISOCC), 2010 International
Conference_Location
Seoul
Print_ISBN
978-1-4244-8633-5
Type
conf
DOI
10.1109/SOCDC.2010.5682878
Filename
5682878
Link To Document