Title :
A High-Speed HBT Prescaler Based on the Divide-by-Two Topology
Author :
Wei, Hung-Ju ; Meng, Chinchun ; Chang, YuWen ; Lin, Yi-Chen ; Huang, Guo-Wei
Author_Institution :
Dept. of Commun. Eng., Nat. Chiao Tung Univ., Hsinchu
Abstract :
This paper demonstrates the Divide-by-4/5 prescalers with merged AND gates in 2 mum GalnP/GaAs heterojunction bipolar transistor (HBT) and 0.35 mum SiGe HBT technologies. By biasing the HBT near the peak transit-time frequency (fr), the maximum operating frequency of a D-type flip-flop (D-FF) can be promoted. At the supply voltage of 5 V, the GalnP/GaAs prescaler operates from 30 MHz to 5.2 GHz, and the SiGe prescaler has the higher-speed performance of 1 GHz ~ 8 GHz at the cost of power consumption.
Keywords :
Ge-Si alloys; III-V semiconductors; UHF bipolar transistors; VHF devices; bipolar logic circuits; flip-flops; gallium arsenide; gallium compounds; heterojunction bipolar transistors; indium compounds; microwave bipolar transistors; D-type flip-flop; GaInP-GaAs; SiGe; divide- by-two topology; frequency 30 MHz to 5.2 GHz; heterojunction bipolar transistor; high-speed HBT prescaler; peak transit-time frequency; size 0.35 mum; size 2 mum; voltage 5 V; Costs; Energy consumption; Flip-flops; Frequency; Gallium arsenide; Germanium silicon alloys; Heterojunction bipolar transistors; Silicon germanium; Topology; Voltage; Divide-by-4/5; Dual-Modulus; Emitter Couple Logic (ECL); GaInP/GaAs HBT; Prescaler; SiGe HBT;
Conference_Titel :
Microwave Conference, 2007. APMC 2007. Asia-Pacific
Conference_Location :
Bangkok
Print_ISBN :
978-1-4244-0748-4
Electronic_ISBN :
978-1-4244-0749-1
DOI :
10.1109/APMC.2007.4554716
