Title :
16nm P-type carbon nanotube MOSFET device profile optimization for high-speed
Author :
Sun, Yanan ; Kursun, Volkan
Author_Institution :
Dept. of Electron. & Comput. Eng., Hong Kong Univ. of Sci. & Technol., Kowloon, China
Abstract :
Carbon nanotube MOSFET (CN-MOSFET) is a promising future device candidate. The electrical characteristics of 16nm P-type CN-MOSFETs are explored in this paper. The optimum P-type CN-MOSFET device profiles with different number of tubes are identified with a low substrate bias voltage for high-speed operation. Technology development guidelines are provided for achieving high-speed, area efficient, and manufacturable integrated circuits with carbon nanotube transistors.
Keywords :
MOSFET; carbon nanotubes; integrated circuits; optimisation; substrates; P-type carbon nanotube MOSFET device profile optimization; carbon nanotube transistors; electrical characteristics; integrated circuits; low substrate bias voltage; optimum P-type CN-MOSFET device profiles; technology development guidelines; Carbon nanotubes; Degradation; Electron tubes; Logic gates; Performance evaluation; Substrates; Transistors; CN-MOSFET; charge screening effect; chirality vector; high-speed switching; optimum diameter; technology development;
Conference_Titel :
SoC Design Conference (ISOCC), 2010 International
Conference_Location :
Seoul
Print_ISBN :
978-1-4244-8633-5
DOI :
10.1109/SOCDC.2010.5682921
