DocumentCode
1975164
Title
Design and implementation of a FPGA-based Direct digital synthesizer
Author
Shan, Changhong ; Chen, Zhongze ; Yuan, Hua ; Hu, Wei
Author_Institution
Sch. of Electr. Eng., Univ. of South China, Hengyang, China
fYear
2011
fDate
16-18 Sept. 2011
Firstpage
614
Lastpage
617
Abstract
A method for the design as well as implementation of FPGA-based Direct digital synthesizer (DDS) is firstly presented in this paper. And then corresponding system simulation and experimental results are given. The DDS for generating a sinusoidal signal owns the features of simple circuit, easy to be controlled, stable performance, high frequency conversion speed and fine accuracy etc. And its output frequency falls in the range of 0Hz ~160KHz with 5 Hz of steps.
Keywords
direct digital synthesis; field programmable gate arrays; network synthesis; DDS; FPGA-based direct digital synthesizer; frequency 0 Hz to 160 kHz; high frequency conversion speed; output frequency; sinusoidal signal; Adders; Clocks; Field programmable gate arrays; Frequency control; Frequency conversion; Frequency synthesizers; Read only memory; Direct digital synthesizer (DDS); FPGA; look-up table; pipeline technology;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical and Control Engineering (ICECE), 2011 International Conference on
Conference_Location
Yichang
Print_ISBN
978-1-4244-8162-0
Type
conf
DOI
10.1109/ICECENG.2011.6057152
Filename
6057152
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