DocumentCode :
1975830
Title :
Survey of model reduction techniques for analysis of package and interconnect models of high-speed designs
Author :
Chiprout, Eli ; Nguyen, Tuyen
Author_Institution :
IBM Austin Res. Lab., TX, USA
fYear :
1997
fDate :
27-29 Oct. 1997
Firstpage :
251
Lastpage :
254
Abstract :
An overview of the recent advances in model reduction techniques of linear interconnect and packaging models for the purpose of simulation is given. The importance of different methods for accuracy, stability and generality are highlighted.
Keywords :
integrated circuit interconnections; integrated circuit modelling; integrated circuit packaging; accuracy; high-speed designs; interconnect models; linear models; model reduction techniques; moment matching; package models; simulation; stability; Circuit simulation; Electronic mail; Integrated circuit interconnections; Nonlinear equations; Packaging; RLC circuits; Reduced order systems; Stability; Timing; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electrical Performance of Electronic Packaging, 1997., IEEE 6th Topical Meeting on
Conference_Location :
Austin, TX
Print_ISBN :
0-7803-8649-3
Type :
conf
DOI :
10.1109/EPEP.1997.634082
Filename :
634082
Link To Document :
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