Title :
A design of multiple-valued logic neuron
Author :
Watanabe, Tatsuki ; Matsumoto, Masayuki ; Enokida, Mitsuaki ; Hasegawa, Takahiro
Author_Institution :
Dept. of Electr. Eng., Toyo Univ., Saitama, Japan
Abstract :
A design for a multiple-valued-logic (MVL) neuron model, in which MVL operations are used to produce analog responses to be fed to a quantizer, is presented. The proposed MVL neuron model can be trained to classify the input pattern vectors according to the special inputs called `desired responses´. The advantages of the MVL neuron model over the ordinary linear neuron model are a robust separation ability and a very fast operation speed in pattern recognition due to the employment of Max and Min operations. The complexity in the training algorithm is similar to that of the ordinary adaptive linear neuron model. Successful simulation results of the training for pattern recognition are shown
Keywords :
learning systems; many-valued logics; neural nets; pattern recognition; analog responses; desired responses; input pattern vectors; multiple-valued logic neuron; pattern recognition; quantizer; robust separation ability; training algorithm; Circuit simulation; Employment; Fuzzy logic; Logic circuits; Logic design; Neurons; Pattern recognition; Robustness; Sequential circuits; Vectors;
Conference_Titel :
Multiple-Valued Logic, 1990., Proceedings of the Twentieth International Symposium on
Conference_Location :
Charlotte, NC
Print_ISBN :
0-8186-2046-3
DOI :
10.1109/ISMVL.1990.122657