DocumentCode :
1976452
Title :
CBF: a high-performance scheduling algorithm for buffered crossbar switches
Author :
Mhamdi, Lotfi ; Hamdi, Mounir
Author_Institution :
Dept. of Comput. Sci., Hong Kong Univ. of Sci. & Technol., Kowloon, China
fYear :
2003
fDate :
24-27 June 2003
Firstpage :
67
Lastpage :
72
Abstract :
Buffered crossbar switches have been considered as a viable alternative to bufferless crossbar switches to improve the switching performance. An architecture that combines the strength of the VOQ (virtual output queueing) architecture with an internally buffered crossbar fabric presents key advantages over IQ (input-queued) switches. The adoption of VOQs at the input side eradicates the HoL (head-of-line) blocking problem; the use of the internal buffers reduces the output contention and enables totally distributed arbitration, hence overcoming the bottleneck of IQ switches. We show the important role that the internal buffers play in the arbitration process. We propose a scheduling scheme named critical internal buffer first (CBF), which is based on the internal buffer information only. The input scheduling is based on the youngest internal buffer first (YBF) and followed by an output scheme based on the oldest internal buffer first (OBF). Through simulation, our scheme is shown to achieve very high throughput. It outperforms all existing schemes in many traffic patterns. More interestingly, our scheme shows very good stability performances without maintaining any kind of information about the input VOQs.
Keywords :
buffer storage; queueing theory; scheduling; telecommunication switching; VOQ architecture; buffered crossbar switches; bufferless crossbar switches; critical internal buffer first; head-of-line blocking problem; input-queued switches; internal buffers; oldest internal buffer first; output contention; scheduling algorithm; traffic patterns; virtual output queueing architecture; youngest internal buffer first; Computer architecture; Computer science; Costs; Fabrics; Scalability; Scheduling algorithm; Stability; Switches; Throughput; Traffic control;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
High Performance Switching and Routing, 2003, HPSR. Workshop on
Print_ISBN :
0-7803-7710-9
Type :
conf
DOI :
10.1109/HPSR.2003.1226682
Filename :
1226682
Link To Document :
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