Title :
1 GHz 100 W Internally Matched Static Induction Transistor
Author :
Aiga, M. ; Higaki, Y. ; Kato, M. ; Kajiwara, Y. ; Yukimoto, Y. ; Shirahata, K.
Author_Institution :
Semiconductor Laboratory, Mitsubishi Electric Corporation, 4-1, Mizuhara, Itami, Hyogo, 664, JAPAN
Abstract :
A 1 GHz lOOW transistor has been accomplished with a new silicon device, static induction transistor. A fine patterning technique brought the transistor chip to a high pawer capacity without sacrificing a power gain. An internal matching technique was employed to ensure the parallel openration of multi-celled transistor chips. As a result, at 1 GHz CW operation, a gain of 4 dB and a drain efficiency of 55 % with an output paver of 100 watts was obtained. The saturation output power, at 1 dB gain compression point, was 110 watts. This successful performance was brought by the achievement of even power sharing, which was obtained by the aids of the internal matching and a thermal stability at high current region of the static induction transistor in its nature.
Keywords :
Bipolar transistors; Capacitance; Electrodes; Fabrication; Gain; Microwave devices; Power generation; Silicon devices; Solid state circuits; Thermal stability;
Conference_Titel :
Microwave Conference, 1979. 9th European
Conference_Location :
Brighton, UK
DOI :
10.1109/EUMA.1979.332767