RF substrates yield improvement using package-chip co-design and on-chip calibration

In this paper, yield improvement methodology is proposed for RF substrates with embedded RF passive circuitry. The proposed methodology introduces a concept of package-chip co-design and on-chip calibration of active circuitry for the yield improvement of off-chip passive embedded RF filters. RF receiver architecture for the package-chip co-design and on-chip calibration technique is presented. Using the proposed methodology, it is shown that the yield of RF substrates is improved from 88% to 98%. Also, the measurements results are presented.