Design and analysis of an optical-powered on-chip power supply

The design of an optical-powered on-chip power supply is described. This power supply is intended for use with microchips. An NMOS voltage doubler, a CMOS voltage doubler, a CMOS voltage tripler, and a CMOS oscillator have been designed. The design of an n-stage voltage multiplier is proposed and simulated. The optical powered on-chip power supply consists of a CMOS voltage tripler and a CMOS oscillator used as a clock. Simplicity has been emphasized in the design. The static power dissipation for an NMOS transistor design is much more than that of a CMOS transistor design. The NMOS design performance deteriorates under load conditions. The CMOS design has very minimal static power consumption. Because of this, the CMOS design is superior to the NMOS design. This power supply can deliver power of about 25 μW with a regulation of about 10% using on-chip capacitors. Higher power operation is obtained using external capacitors. Standard 3-micron CMOS MOSIS (MOS Implementation Service) design rules have been used for the design and simulation of the circuit. The representative chip area allocated to a 25 μW source is 0.25 mm². The whole circuit is simulated by using UC Berkeley SPICE2G.5/6